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标题: Design and modeling of PLL-based clock and data recovery circuits with period... [打印本页]

作者: skycloud    时间: 2018-6-12 17:34
标题: Design and modeling of PLL-based clock and data recovery circuits with period...
题名Design and modeling of PLL-based clock and data recovery circuits with periodically embedded clock encoding for intra-panel interfaces
链接http://xueshu.baidu.com/s?wd=paperuri%3A%28b1312ff82078197b4cefa9bdf52850d8%29&filter=sc_long_sign&tn=SE_xueshusource_2kduw22v&sc_vurl=http%3A%2F%2Fieeexplore.ieee.org%2Fdocument%2F7539027%2F&ie=utf-8&sc_us=16321877776152240821


作者: pylchm    时间: 2018-6-12 17:34
http://disk.680.com/Z7Nf6n




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